Featured Research

from universities, journals, and other organizations

Finer Copper Wires For Faster Integrated Circuits

Date:
April 6, 1999
Source:
Lawrence Berkeley National Laboratory
Summary:
Othon Monteiro of the Department of Energy's Lawrence Berkeley National Laboratory has devised a new way to inlay copper wires in the semiconductor wafers used to create integrated circuits. In the May/June 1999 issue of the Journal of Vacuum Science and Technology B, Monteiro discusses his method of "ion-assisted trench filling," which promises to open the way to ever more densely packed chips beyond the year 2000.

BERKELEY, CA -- Othon Monteiro of the Department of Energy's Lawrence Berkeley National Laboratory has devised a new way to inlay copper wires in the semiconductor wafers used to create integrated circuits. In the May/June 1999 issue of the Journal of Vacuum Science and Technology B, Monteiro discusses his method of "ion-assisted trench filling," which promises to open the way to ever more densely packed chips beyond the year 2000.

A National Technology Roadmap issued by the Semiconductor Industry Association predicts that new lithography methods will reduce today's smallest chip features, already as fine as 250 nanometers (billionths of a meter), to 180 nanometers in 1999, 100 nanometers by 2006, and even finer dimensions in the years beyond -- making it possible to pack hundreds of millions more electronic devices on a chip.

Many of these microscopic devices must be interconnected by metal wires, which are made by filling tiny trenches in the surface of the semiconductor wafer. Multiple levels are connected by penetrating a layer to make contacts with layers above and below. The standard stuff of such wires has long been aluminum or aluminum alloys and, in interlayer connectors, tungsten.

"As device sizes get smaller, the electrical properties of aluminum will not meet the new requirements," says Monteiro, a materials scientist in the Plasma Applications Group of Berkeley Lab's Accelerator and Fusion Research Division. "We need lower resistivity and greater resistance to electromigration." Electromigration is the drift of metal atoms when the conductor carries high current densities, which can create voids. He adds, "We also need something that's compatible with lower dielectric-constant materials," which have been introduced by chip manufacturers to improve insulation and reduce circuit delays.

Copper is much more conductive than aluminum, allowing finer wires with lower resistive losses. Copper is also significantly less vulnerable to electromigration than aluminum and less likely to fracture under stress. Unfortunately, "copper is poisonous to silicon," Monteiro says. "It readily diffuses into silicon and causes deep-level defects."

Less than two years ago the first commercial copper-wired chips were announced by IBM and Motorola. To keep the copper from migrating into the dielectric and poisoning it, a diffusion barrier was used, which lined the trench walls between the copper and the substrate. Motorola used titanium nitride as a barrier. Other possible barrier materials include tantalum, tantalum alloys, and tantalum nitride.

IBM and Motorola produced their copper-wired chips by electroplating the copper over the diffusion barrier. Although Monteiro's ion-assisted technique can be used either in conjunction with electroplating or by itself, it has several advantages over electroplating. It can produce thinner, more uniform layers of metals in a variety of architectures. It can be used in narrower trenches with higher depth-to-width aspect ratios. It can fill trenches from the bottom up, automatically eliminating uneven deposition that can lead to voids in the metal lines-or it can produce conformal thin films that mirror the shape of the patterned wafer.

To employ the technique, a substrate wafer etched with trenches is placed under a plasma source. A pulsed-bias voltage is applied to the substrate and can be tuned to accelerate ions toward both the sides and bottom of the trench -- in which case a layer builds up evenly -- or preferentially to the bottom, filling the trench from the bottom up. The process is terminated when the precise desired thickness of the material has been applied.

Films consisting of multiple layers are readily deposited using different cathode materials -- copper, tantalum, tantalum nitride, and a variety of other materials can be applied in this way. Copper metalization, for example, may begin by depositing a conformal film of tantalum 20 to 50 nanometers thick. Ions of copper are then deposited on top of the tantalum layer. The process can be halted when the new material has formed a thin conformal coating, or deposition can be continued until the trench is filled completely. Another possibility is to use the thin copper layer as a "seed layer" and fill the trench electrochemically.

To facilitate closer packing and multilevel connections, trenches are getting proportionally deeper as they get narrower. "Deep trenches etched into the dielectric must be filled completely, without voids or defects," Monteiro says. "With current technology, the deeper the trench, the more likely there will be defects."

At present, "dual-Damascene" methods are used to etch the trenches, fill them electrolytically, then mechanically polish away the excess metal using a chemically active slurry (the term is borrowed from the way the Arab swordsmiths of medieval Damascus inlaid their famous weapons). Etching and filling narrow structures with high aspect ratios will be especially difficult for dual-Damascene architectures.

Multilayer film methods will be essential, but a problem with common vapor-deposition techniques is that material builds up at the top of the trench and closes it off, leaving a void below. In ion-assisted deposition, however, the highly charged ions drive straight into the trench, dislodging excessive build-up before it accumulates.

"The challenge is to address narrower paths," Monteiro says. "Our goal is to get from 250 nanometers to 100 nanometers, at a 10-to-one aspect ratio. And I'm confident we can go even below that."

Monteiro, who has applied for a patent on ion-assisted trench filling, says that what amazes him about the semiconductor industry " is that they know where they want to be without knowing how they're going to get there, but somehow they always do." Monteiro's new technique is one of the latest technologies to come to the industry's rescue.


Story Source:

The above story is based on materials provided by Lawrence Berkeley National Laboratory. Note: Materials may be edited for content and length.


Cite This Page:

Lawrence Berkeley National Laboratory. "Finer Copper Wires For Faster Integrated Circuits." ScienceDaily. ScienceDaily, 6 April 1999. <www.sciencedaily.com/releases/1999/04/990406043351.htm>.
Lawrence Berkeley National Laboratory. (1999, April 6). Finer Copper Wires For Faster Integrated Circuits. ScienceDaily. Retrieved September 2, 2014 from www.sciencedaily.com/releases/1999/04/990406043351.htm
Lawrence Berkeley National Laboratory. "Finer Copper Wires For Faster Integrated Circuits." ScienceDaily. www.sciencedaily.com/releases/1999/04/990406043351.htm (accessed September 2, 2014).

Share This




More Computers & Math News

Tuesday, September 2, 2014

Featured Research

from universities, journals, and other organizations


Featured Videos

from AP, Reuters, AFP, and other news services

Japan Firm Showcases 'touchable' 3D Technology

Japan Firm Showcases 'touchable' 3D Technology

AFP (Sep. 2, 2014) Technology that generates touchable 3D imagery is unveiled in Japan, with its developers saying users could pull and push objects that are not really there. Duration: 01:07 Video provided by AFP
Powered by NewsLook.com
Oops! Microsoft Hints At Windows 9 Launch, Rumors Abound

Oops! Microsoft Hints At Windows 9 Launch, Rumors Abound

Newsy (Sep. 2, 2014) Microsoft's Chinese offices may have just named and set a rough date for the company's next operating system, Windows 9. Video provided by Newsy
Powered by NewsLook.com
Google Teases India Event, Possible Android One Reveal

Google Teases India Event, Possible Android One Reveal

Newsy (Sep. 1, 2014) Google has announced a Sept. 15 event in India during which they're expected to reveal their Android One phones. Video provided by Newsy
Powered by NewsLook.com
Google's Self-Driving Car Still Has Many Flaws

Google's Self-Driving Car Still Has Many Flaws

Newsy (Sep. 1, 2014) You've seen a lot of Google's self-driving car, but that doesn't mean it's coming soon. A new report says the vehicle is nowhere near road ready. Video provided by Newsy
Powered by NewsLook.com

Search ScienceDaily

Number of stories in archives: 140,361

Find with keyword(s):
Enter a keyword or phrase to search ScienceDaily for related topics and research stories.

Save/Print:
Share:

Breaking News:
from the past week

In Other News

... from NewsDaily.com

Science News

Health News

Environment News

Technology News



Save/Print:
Share:

Free Subscriptions


Get the latest science news with ScienceDaily's free email newsletters, updated daily and weekly. Or view hourly updated newsfeeds in your RSS reader:

Get Social & Mobile


Keep up to date with the latest news from ScienceDaily via social networks and mobile apps:

Have Feedback?


Tell us what you think of ScienceDaily -- we welcome both positive and negative comments. Have any problems using the site? Questions?
Mobile: iPhone Android Web
Follow: Facebook Twitter Google+
Subscribe: RSS Feeds Email Newsletters
Latest Headlines Health & Medicine Mind & Brain Space & Time Matter & Energy Computers & Math Plants & Animals Earth & Climate Fossils & Ruins