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Soft Hardware For A Flexible Chip

Apr. 24, 2009 — Technology is struggling to meet demands for high-performance, specialised computing systems. A European consortium is responding with a new kind of reconfigurable chip that is both efficient and flexible.


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Computers are everywhere, from washing machines to medical body scanners, from MP3 players to air traffic control systems. Yet as these specialised ‘embedded systems’ become ever-more common, the technology is struggling to keep up with the demand for computing power.

Pressure is coming mainly from high-performance applications that need to process huge amounts of data in a short time. Examples include digital video processing, telecoms, and military applications.

“This kind of equipment needs high computing performance for signal processing and for making decisions,” says Philippe Bonnot of Thales Research and Technology who is coordinating the MORPHEUS project. “But the solutions are not as efficient as we would like.”

The challenge is to design embedded systems that are both efficient and flexible. A normal microprocessor is cheap and flexible and can be used for many applications, but with power consumption at around 100 watts it is not an efficient use of energy and cannot be used in a confined space.

On the other hand, a circuit designed specifically for one application, known as an ASIC, can be extremely efficient but totally inflexible. For that reason, they are very expensive to design and manufacture.

“Another type of device, called an FPGA [field-programmable gate array], is a partial solution but difficult to use in practice because of the hardware programming skills required,” Bonnot says.

The EU-funded MORPHEUS project, which includes big manufacturers of embedded systems such as Thales, Thomson, Alcatel-Lucent, STMicroelectronics and Intracom, is exploring a new approach.

Having your cake and eating it

“We tried to solve all these problems by merging a processor with reconfigurable units embedded in the same component,” says Bonnot. “We think we can both have the flexibility and the efficiency.”

Reconfigurable hardware can be programmed to connect itself in many different ways. When a new application is required, the hardware can be modified just as a piece of software can be altered to do a different job.

“The reconfigurable technology makes specific solutions possible. You can design exactly what you need so you are efficient, but it’s reconfigurable so you can reuse the component for another application.”

Several different types of reconfigurable building blocks have been integrated into the chip to increase the range of possible applications.

“The flexibility we have in the chip is even higher because we inserted an operating system which can modify the configurations of the building blocks at run-time,” Bonnot explains. “So, during execution, we can modify the functions that are implemented in the reconfigurable units.”

This design means that the chip is more complex to program but the project has developed a set of programming tools to help.

A design company would be able to take a MORPHEUS chip and configure it to do exactly what a customer requires. It would have the advantages of an ASIC but would be cheaper as it could be manufactured in large numbers.

Prototype chip

Applications examined in the project include professional video processing, broadband wireless access systems, network routing applications, and many defence and security systems such as ‘smart’ cameras. The chips could also have wide application in multimedia, communication, instrumentation and robotics. What these applications all have in common is a need for intensive data processing in real time and in a compact space.

Early in 2009, partner STMicroelectronics produced the first prototypes of the MORPHEUS chip. It contains 97 million transistors and is expected to consume no more than one watt of power.

The chip will be integrated into several application boards for testing by the larger industrial partners. Video and network applications will be a priority. “It will be interesting to see if this new approach can really attract the interest of our companies,” says Bonnot. “It’s almost a new kind of paradigm.”

He expects there will be several modifications to the prototype before it can be considered for commercialisation. In the meantime, the SMEs in the project may be able to market one of the reconfigurable units and a compiler.

There is still more to do. Bonnot points out that the silicon technology used in the chip is several years old. “We only used 90 nanometre technology,” he says. “So with more aggressive technology we could get some better results – we could put more units on to the chip and we could have a higher clock frequency.”

The MORPHEUS project, which received funding from the EU’s Sixth Framework Programme for research, is being presented at the DATE09 conference in Nice on 21 April.

More information is available at: http://www.morpheus-ist.org/

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The above story is reprinted from materials provided by ICT Results, via AlphaGalileo.

Note: Materials may be edited for content and length. For further information, please contact the source cited above.


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