Most of these applications require inexpensive portable hardware that can generate signals in the GHz to THz range with more than 1 watt of power. However, transistors on a standard silicon chip have been limited to a few milliwatts at up to about 100 GHz.

Now a method of generating high-power signals at frequencies of 200 GHz and higher on an ordinary silicon chip has been proposed by Ehsan Afshari, Cornell assistant professor of electrical and computer engineering, and Harish Bhat, assistant professor of mathematics at the University of California-Merced. The researchers present a mathematical analysis of the new method in the May issue of the journal Physical Review E.

Afshari and Bhat propose to use a phenomenon known as nonlinear constructive interference. Linear constructive interference occurs when two signals that are in phase -- that is, with their peaks and valleys matched -- produce a new signal as large as both added together. But if the signals are traveling through an uneven medium, the waves can become distorted, some delayed, some moving ahead to produce a "nonlinear" result that combines many small waves into fewer large peaks. Afshari likens the effect to the breaking of waves on the seashore. In the open ocean, waves travel as smooth undulations. But near shore the waves encounter an uneven surface at varying depths and become distorted into breakers.

To create this effect on a chip, the researchers propose a lattice of squares made up of inductors -- the equivalent of tiny coils of wire -- with each intersection grounded through a capacitor. An electrical wave moves across the lattice by alternately filling each inductor then discharging the current into the adjacent capacitor. A capacitor temporarily stores and releases electrons, and these capacitors, made of layers of silicon and silicon dioxide, are designed to vary their storage capacity as the voltage of the signal changes, creating the equivalent of the varying depths of an ocean beach and distorting the timing of the electrical signals that pass by.

When low-frequency, low-power signals are applied simultaneously to both the vertical and horizontal wires of the lattice, the waves they produce interfere as they meet across the lattice, combining many small waves into one large peak. The process produces harmonic signals at multiples of the original frequency, and a high-power, high-frequency signal can be read out somewhere in the middle of the lattice.

According to computer simulations by Afshari and Bhat, the process can be implemented on a common complimentary metal-oxide silicon (CMOS) chip to generate signals at frequencies well above the ordinary cutoff frequencies of such chips, with at least 10 times the input power. Frequencies up to around 1.16 THz are possible, the researchers predict.

The research is partially supported by the National Science Foundation.

Note: If no author is given, the source is cited instead.

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