"These safety features -- or meta-functions -- can slow a program down so much that software developers will often leave them out entirely," says Dr. James Tuck, an assistant professor of electrical and computer engineering at NC State and leader of the research team that designed the new tool. "Leaving out those features can mean that you don't identify a problem as soon as you could or should, which can be important -- particularly if it's a problem that puts your system at risk from attack."

Historically, these safety features have been incorporated directly into a software program's code, and are run through the same core -- the central processing unit that serves as the brain of a computer chip -- that the program itself uses. That is what slows the program down. Researchers at NC State have developed a tool that takes advantage of multi-core computer chips by running the safety features on a separate core in the same chip -- most chips currently contain between four and eight cores -- allowing the main program to run at close-to-normal operating speed.

"To give you some idea of the problem, we saw the application we were testing being slowed down by approximately 580 percent," Tuck says. "Utilizing our software tool, we were able to incorporate safety metafunctions, while only slowing the program down by approximately 25 percent. That's a huge difference."

This multi-core approach has been tried before, but previous efforts were unwieldy and involved replicating huge chunks of code -- a process that was time-consuming and used a great deal of power. The new tool, Tuck says, "significantly streamlines the safety feature work being done by other cores."

Tuck stresses that that tool functions automatically, and does not involve manual reprogramming. In fact, Tuck's team found that the tool is more effective than manual reprogramming for at least some applications, and is far less labor intensive.

The software tool is implemented as a plug-in for the Gnu Compiler Collection of software tools, and Tuck's team is working to fine-tune and extend the tool to support a wider range of applications and meta-functions. "We plan to release the first version of this tool as open-source software later this spring," Tuck says.

A paper describing the research, "Automatic Parallelization of Fine-Grained Meta-Functions on a Chip Multiprocessor," will be presented April 5 at the International Symposium on Code Generation and Optimization in Chamonix, France. The paper was co-authored by Tuck and NC State Ph.D. student Sanghoon Lee. The research was supported by the National Science Foundation.

NC State's Department of Electrical and Computer Engineering is part of the university's College of Engineering.

Note: If no author is given, the source is cited instead.

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