Apr. 2, 2007 Despite the attractive electrical properties and physical features of single-walled carbon nanotubes, incorporating them into scalable integrated circuits has proven to be a challenge because of difficulties in manipulating and positioning these molecular scale objects and in achieving sufficient current outputs.
Now, researchers at the University of Illinois, Lehigh University and Purdue University have developed an approach that uses dense arrays of aligned and linear nanotubes as a thin-film semiconductor material suitable for integration into electronic devices.
The nanotube arrays can be transferred to plastic and other unusual substrates for applications such as flexible displays, structural health monitors and heads-up displays. The arrays also can be used to enhance the performance of devices built with conventional silicon-based chip technology.
"The aligned arrays represent an important step toward large-scale integrated nanotube electronics," said John A. Rogers, a Founder Professor of Materials Science and Engineering at Illinois, and corresponding author of a paper accepted for publication in the journal Nature Nanotechnology, and posted on its Web site.
To create nanotube arrays, the researchers begin with a wafer of single-crystal quartz, on which they deposit thin strips of iron nanoparticles. The iron acts as a catalyst for the growth of carbon nanotubes by chemical vapor deposition. As the nanotubes grow past the iron strips, they lock onto the quartz crystal, which then aligns their growth.
The resulting linear arrays consist of hundreds of thousands of nanotubes, each approximately 1 nanometer in diameter (a nanometer is 1 billionth of a meter), and up to 300 microns in length (a micron is 1 millionth of a meter). The nanotubes are spaced approximately 100 nanometers apart.
The arrays function as an effective thin-film semiconductor material in which charge moves independently through each of the nanotubes. In this configuration, the nanotubes can be integrated into electronic devices in a straightforward fashion by conventional chip-processing techniques.
A typical device incorporates approximately 1,000 nanotubes, and can produce current outputs 1,000 times higher than those of previously reported devices that incorporate just a single nanotube. Many devices can be built from each array, with good device-to-device uniformity. Detailed theoretical analysis of these unusual devices reveals many aspects of their operation.
Using the arrays, the researchers built and tested a number of transistors and logic gates, and compared the properties of nanotube arrays with those of individual nanotubes.
"This is the first study that shows properties in scalable device configurations that approach the intrinsic properties of the tubes themselves, as inferred from single-tube studies," said Rogers, who also is a researcher at the university's Beckman Institute.
Nanotube arrays aren't likely to replace silicon, Rogers said, but could be added to a silicon chip and exploited for particular purposes, such as higher speed operation, higher power capacity and linear behavior for enhanced functionality. They can also be used in applications such as flexible devices, for which silicon is not well suited.
"Nanotubes have shown potential in the past, but there hasn't been a clear path from science to technology," said Moonsub Shim, a professor of materials science and engineering at Illinois, and a co-author of the paper. "Our work seeks to bridge this gap."
With Rogers and Shim, co-authors of the paper are postdoctoral research associate Seong Jun Kang and graduate students Coskun Kocabas and Taner Ozel, all at Illinois; electrical and computer engineering professor Muhammad A. Alam and graduate student Ninad Pimparkar at Purdue, and physics professor Slava V. Rotkin at Lehigh.
The National Science Foundation and the U.S. Department of Energy funded the work.
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