June 28, 2007 A prototype of what may be the next generation of personal computers has been developed by researchers in the University of Maryland's A. James Clark School of Engineering. Capable of computing speeds 100 times faster than current desktops, the technology is based on parallel processing on a single chip.
Parallel processing is an approach that allows the computer to perform many different tasks simultaneously, a sharp contrast to the serial approach employed by conventional desktop computers. The prototype developed by Uzi Vishkin and his Clark School colleagues uses a circuit board about the size of a license plate on which they have mounted 64 parallel processors. To control those processors, they have developed the crucial parallel computer organization that allows the processors to work together and make programming practical and simple for software developers.
“The single-chip supercomputer prototype built by Prof. Uzi Vishkin’s group uses rich algorithmic theory to address the practical problem of building an easy-to-program multicore computer,” said Charles E. Leiserson, professor of computer science and engineering at MIT. “Vishkin’s chip unites the theory of yesterday with the reality of today.”
Desktop Parallel Processing
Parallel processing on a massive scale using numerous interconnected chips or computers has been used for years to create supercomputers. However, its application to desktop systems has been a challenge because of severe programming complexities. The Clark School team found a way to use single chip parallel processing technology to change that.
Vishkin, a professor in the Clark School’s electrical and computer engineering department and the University of Maryland Institute for Advanced Computer Studies (UMIACS), explained the advantage of parallel processing like this: “Suppose you hire one person to clean your home, and it takes five hours, or 300 minutes, for the person to perform each task, one after the other,” Vishkin said. “That’s analogous to the current serial processing method. Now imagine that you have 100 cleaning people who can work on your home at the same time! That’s the parallel processing method.
“The ‘software’ challenge is: Can you manage all the different tasks and workers so that the job is completed in 3 minutes instead of 300?” Vishkin continued. “Our algorithms make that feasible for general-purpose computing tasks for the first time.”
Vishkin and his team are now demonstrating their technology, which in future devices could include 1,000 processors on a chip the size of a finger nail, to government and industry groups. To show how easy it is to program, Vishkin is also providing access to the prototype to students at Montgomery Blair High School in Montgomery County, Md.
From Theory to Reality
For years, the personal computer industry achieved advancements in computer clock speed, the fundamental rate at which a computer performs operations, thanks to innovations in chip fabrication technologies and miniaturization. Moore’s Law—which dictates that the number of transistors on integrated circuits in computers will double every 18 to 24 months—was coupled with a corresponding improvement in clock speed.
But no advancements in clock speed have been achieved since 2004. From an early stage, Vishkin foresaw that Moore’s Law would ultimately fail to help improve clock speed due to physical limitations. This has guided his perseverance over his professional career in seeking to improve computer productivity by distributing the load among multiple processors, accomplishing computer tasks in parallel.
In 1979, Vishkin, a pioneer in parallel computing, began his work on developing a theory of parallel algorithms that relied on a mathematical model of a parallel computer, since, at that time, no viable parallel prototype existed. By 1997, advances in technology enabled him to begin building a prototype desktop device to test his theory; he and his team completed the device in December 2006.
The prototype device’s physical hardware attributes are strikingly ordinary—standard computer components executing at 75 MHz. It is the device’s parallel architecture, ease of programming and processing performance relative to other computers with the same clock speed that get people’s attention.
“Based on the very positive reactions of my graduate students this spring,” Vishkin stated, “I knew that it was time to take the technology public.”
Earlier this month, Vishkin and his Ph.D. student, Xingzhi Wen, published a paper about his newly-built parallel processing technology for the Association for Computing Machinery (ACM) Symposium on Parallelism in Algorithms and Architectures, and showcased it at a major computing conference, the ACM International Conference on Supercomputing (ICS) in Seattle.
At the ICS event, Vishkin allowed conference participants to connect to the device remotely and run programs on it in a full-day tutorial session he conducted, offering colleagues and student participants the opportunity to experience the prototype technology firsthand.
Vishkin also participated in a panel discussion at a special invitation-only Microsoft Workshop on Many-Core Computing on June 20-21 in Seattle, Wash. In August, Vishkin will present a keynote address at the Workshop on Highly Parallel Processing on a Chip in Rennes, France, held in conjunction with the 13th Euro-Par, an international European conference on parallel and distributed computing.
“This system represents a significant improvement in generality and flexibility for parallel computer systems because of its unique abilities,” said Burton Smith, technical fellow for advanced strategies and policy at Microsoft. “It will be able to exploit a wider spectrum of parallel algorithms than today’s microprocessors can, and this in turn will help bring general purpose parallel computing closer to reality.”
Vishkin has filed several patents on his parallel processing technology since 1997. Funded by the National Science Foundation and the Department of Defense, his research has also received significant interest from the computer industry, which he believes his technology will revitalize.
“The manufacturers have done an excellent job over the years of increasing a single processor’s clock speed through clever miniaturization strategies and new materials,” he noted. “But they have now reached the limits of this approach. It is time for a practical alternative that will allow a new wave of innovation and growth—and that’s what we have created with our parallel computing technology.”
In addition to Xingzhi Wen, Vishkin’s research teams includes students Aydin Balkan, George Caragea, Mike Detwiler, Tom Dubois, Mike Horak, Fuat Keceli, Mary Kiemb and Alex Tzannes, as well as electrical and computer engineering professors Rajeev Barua and Gang Qu.
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