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Versatile algorithms for nanoscale designs

Date:
November 4, 2010
Source:
University of Cologne - Universität zu Köln
Summary:
Today’s RFIC (integrated circuits for radio frequency) design is integrated with digital and analog modules on the same die, posing severe challenges to existing simulation tools. Researchers are working to overcome the barriers in both existing and future radio frequency design flows by developing and deploying integrated simulation algorithms and prototype tools.

Today's RFIC (integrated circuits for radio frequency) design is integrated with digital and analog modules on the same die, posing severe challenges to existing simulation tools. The ambitious objective of the EU-funded ICESTARS research project has been to overcome the barriers in both existing and future radio frequency design flows by developing and deploying integrated simulation algorithms and prototype tools.

Driven by the market demand for higher bandwidth and more end-product capability, RF designs are moving into higher frequency ranges and growing in complexity. The processes to develop both electronic design automation (EDA) and computer aided design (CAD) -- indispensable to design integrated circuits for RF design -- and their underlying mathematics are themselves complex. It necessitates new modelling approaches, new mathematical solution procedures and numerical simulations with mixed analog and digital signals. That is where the ICESTARS (Integrated Circuit/EM Simulation and Design Technologies for Advanced Radio Systems-on-chip) research focus is situated. The consortium comprises five leading mathematical institutes (Universities of Cologne, Wuppertal, Upper Austria [Hagenberg], Oulu and Aalto[Espoo]), two semiconductor companies (NXP Semiconductors [Eindhoven] and Infineon Technologies [Munich]) and two software providers (AWR-APLAC [Espoo] and Magwel [Leuven]).

"Advancing RF design in super high and extremely high frequencies (SHF and EHF, i.e., beyond 3 GHz) necessitates new transceiver architectures and CAD tools as today's EDA tools are functionally not adequately addressing the simulation challenges of high-frequency designs. The project's research areas have been the efficient connection between the frequency domain, where the RF part of wireless transceiver systems is usually designed, and the time domain, where the digital signal processing and control logic are developed," Jan ter Maten, NXP Semiconductors, outlines what ICESTARS is about. "Then, in electromagnetic (EM) analysis and coupled EM circuit analysis we deal with the 'communication' of the physical layer (such as mapping of devices) and the mathematical one."

A sound mathematical basis is the starting point of all ICESTARS research. Mathematical equations such as ordinary differential equations (ODEs), differential-algebraic equations (DAEs) and partial differential-algebraic equations (PDAEs) are basis of time- and frequency-domain analyses, whose purpose is to predict the behaviour of the designed ICs, before the expensive manufacturing process starts. In ICESTARS these algorithms have been modified to cover extended functionalities and entire new algorithms have been developed to meet the simulation demands of circuits operating in frequency beyond 3 GHz.

An entirely new mathematical undertaking

When it comes to mutual simulation of digital and analog RF parts, standard time-domain techniques alone are far from sufficient. Therefore, in ICESTARS, a prototype of adaptive wavelet-based analysis, an entirely new circuit simulation algorithm has been developed and successfully tested at Infineon. In circuit-envelope simulation, input waveforms are represented as RF carriers with modulation envelopes. By embedding the system of DAEs into partial DAEs the project succeeded in formulating a general mathematical framework that can be adapted to different classes of RF circuits. An optimal dynamic time splitting allows efficient simulation of frequency or amplitude modulated signals.

Adaptivity was core to the frequency-domain research in the project. Adaptivity denotes the dynamic simulator adjustment to the frequency response of amplifiers, filters, mixers etc. in terms of network parameters or frequency-dependent noise. The project aimed at achieving reasonable estimates for the initial conditions for distortion analysis of free-running oscillators, and for the first time, in ICESTARS, a truly generic multi-device, a so-called VoHB algorithm, was coded and tested for circuits that are larger than plain single-transistor power amplifiers. New robust and efficient nonlinear solution methods have been developed in close cooperation between academia and industries.

The ever increasing miniaturisation of future circuits realised in physical models necessitates the simulation of simulation of circuits that take electromagnetic field effects into account.. Simulations are used to extract and verify the compact models for both active and passive devices by computation of how they interact locally. Conventional equations for circuits neglect such physical effects and only try to re-build complex building blocks using single parameters -- a procedure lacking efficiency as there might be up to 800 parameters. In an entirely new mathematical undertaking these problem was tackled by modeling the building blocks using PDAEs to better project the physical complexity of the models.

As a proof of concept the academically developed mathematical analysis methods have been implemented by the industrial partners and Upper Austria University in real-life simulation and/or industrial use cases. The simulation results of the tools and algorithms were then compared against the results obtained with commercial or public domain tools -- the ICESTARS validation has successfully covered the complete functionality of the tools that have been developed.

But that is the just the beginning. The advanced algorithms developed within ICESTARS have the potential to substantially reduce the simulation overhead within the RF design process, thereby improving the RF designer's ability to deal with chip development for the generations ahead.


Story Source:

The above story is based on materials provided by University of Cologne - Universität zu Köln. Note: Materials may be edited for content and length.


Cite This Page:

University of Cologne - Universität zu Köln. "Versatile algorithms for nanoscale designs." ScienceDaily. ScienceDaily, 4 November 2010. <www.sciencedaily.com/releases/2010/11/101104193957.htm>.
University of Cologne - Universität zu Köln. (2010, November 4). Versatile algorithms for nanoscale designs. ScienceDaily. Retrieved April 20, 2014 from www.sciencedaily.com/releases/2010/11/101104193957.htm
University of Cologne - Universität zu Köln. "Versatile algorithms for nanoscale designs." ScienceDaily. www.sciencedaily.com/releases/2010/11/101104193957.htm (accessed April 20, 2014).

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