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Implant-free quantum-well SiGe pFETs for future high-performance CMOS architectures

Date:
July 12, 2011
Source:
Interuniversity Microelectronics Centre (IMEC)
Summary:
Researchers in Belgium have successfully fabricated implant-free quantum-well (IF-QW) pFETs with an embedded silicon-germanium (SiGe) source/drain. These devices show an excellent short channel control and a record logic performance. A benchmark against various competing technologies showed competitive results. Finally, the device performance was also demonstrated at low operating voltages. These results prove that this device architecture is a viable option for the 16nm technology node and beyond.
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Imec announces that it has successfully fabricated implant-free quantum-well (IF-QW) pFETs with an embedded silicon-germanium (SiGe) source/drain. These devices show an excellent short channel control and a record logic performance. A benchmark against various competing technologies showed competitive results. Finally, the device performance was also demonstrated at low operating voltages. These results prove that this device architecture is a viable option for the 16nm technology node and beyond.

Next-generation multimedia applications will require ICs that are at the same time very powerful and low power. One attractive option is to use high-mobility channels, for example using SiGe (silicon-germanium) with a high Ge content. However, further scaling of the gate length will require a better electrostatic gate control, and a low variability of the key electrical parameters. Imec and its partners have recently shown that the IF-QW concept with a buried SiGe channel meets these requirements while significantly improving the device performance.

Imec now presents the 2nd generation of SiGe45% IF-QW pFETs, processed on standard 300mm STI wafers. Compared to earlier IF-QW devices, the raised SiGe and Si substrate are recessed and replaced with a thick SiGe25% epi-layer to form the source/drain electrodes. Also, imec has developed process modules that minimize local variations and maximize the device performance.

This has resulted in an excellent short channel control, with a drain induced barrier lowering of ~110mV/V at 35nm-LG and a record 1mA/µm-Ion at -1V. For lower operating voltages, an increased performance was demonstrated. The devices were benchmarked at various operating voltages against state-of-the-art technologies such as SOI nFETs or SiGe-FET, showing at least equivalent results. These results show that SiGe IF-QW devices with embedded source drain form a promising architecture for integration on bulk Si, from the 16nm node onwards.


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The above story is based on materials provided by Interuniversity Microelectronics Centre (IMEC). Note: Materials may be edited for content and length.


Cite This Page:

Interuniversity Microelectronics Centre (IMEC). "Implant-free quantum-well SiGe pFETs for future high-performance CMOS architectures." ScienceDaily. ScienceDaily, 12 July 2011. <www.sciencedaily.com/releases/2011/07/110712093628.htm>.
Interuniversity Microelectronics Centre (IMEC). (2011, July 12). Implant-free quantum-well SiGe pFETs for future high-performance CMOS architectures. ScienceDaily. Retrieved May 24, 2015 from www.sciencedaily.com/releases/2011/07/110712093628.htm
Interuniversity Microelectronics Centre (IMEC). "Implant-free quantum-well SiGe pFETs for future high-performance CMOS architectures." ScienceDaily. www.sciencedaily.com/releases/2011/07/110712093628.htm (accessed May 24, 2015).

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