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New Research Activities On Resistive RAM

Oct. 14, 2008 — In order to explore solutions to overcome the scaling limitations of conventional Flash memory cells, IMEC has started new research activities on resistive RAM (RRAM) cells. With these activities, IMEC answers the needs of today’s major memory companies.


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Resistive switching memories are based on materials whose resistivity can be electrically switched between high and low conductive states. RRAM is becoming of interest for future scaled memories because of their superior intrinsic scaling characteristics compared to the charge-based Flash devices, and potentially small cell size (enabling dense crossbar RRAM arrays using vertical diode selecting elements). RRAM is seen as a potential candidate to replace conventional Flash memory and hence to push NVM technology towards the (sub-)22nm technology node.

For making such RRAM, different concepts and materials are proposed. IMEC’s research activities on RRAM mainly focus on investigating the switching behavior of the RRAM cell concept that uses metal oxides as a switching element, and on demonstrating its scaling capability down to 25nm. The study concentrates on three main topics, being RRAM stack optimization (including the choice of top and bottom electrode and of the metal oxide), RRAM cell scaling and RRAM integration in a crossbar RRAM array.

These new research activities are part of IMEC’s Emerging Memory program that provides innovative non-volatile memory (NVM) technology, concepts and solutions for the 32nm generation and below. Besides activities on RRAM, IMEC also started to explore floating body cells (FBCs) for embedded and stand-alone DRAM and SRAM replacement. With these activities, IMEC answers the needs of today’s major memory industry players. IMEC’s vast background in NVM memory physics, reliability, modeling as well as process integration in state-of-the-art platforms and design and test issues, allows for these new concepts to be explored in a fast and cost-effective way.

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The above story is reprinted from materials provided by Interuniversity Microelectronics Centre (IMEC).

Note: Materials may be edited for content and length. For further information, please contact the source cited above.


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