Stress Management: X-rays Reveal Defects In Semiconductor Devices

Strained silicon is a new, rapidly developing material for building enhanced-performance silicon-based transistors. Introducing a slight tensile strain in the lattice of the silicon crystal dramatically improves the mobility of charges in the crystal, enabling faster, higher-performance devices. The strain is achieved by first growing a relatively thick crystalline layer of silicon-germanium (SiGe) on the normal silicon substrate wafer, and then growing a thin film of pure silicon on top. The difference in lattice spacing between pure silicon and SiGe creates the desired strain, but also creates occasional defects in the crystal that degrade performance. The problem is particularly bad when the defects cluster together in so-called “pile-ups.”

One of the best methods for studying crystal defects is to observe the image of X-rays diffracted from the crystal planes, a technique called X-ray topography. Until now, however, it’s been impossible to study the interaction of defects in the multiple layers of these complex Si – SiGe – Si wafers. In a recent paper in Applied Physics Letters,* researchers from NIST and AmberWave Systems Corporation (Salem, N.H.) detail a high-resolution form of X-ray topography that can distinguish individual crystal defects layer by layer. The technique combines an extremely low-angle incident X-ray beam (“glancing incidence”) to increase the signal from one layer over another and the use of highly monochromatic X-rays tuned to separate the contributions from each layer based on their different lattice spacings.

Their results show that crystal defects initially created at the interface between the silicon wafer and the SiGe layer become “templates” that propagate through that layer and create matching defects in the strained-silicon top layer. These defects, in turn, are notably persistent, remaining in the strained-silicon even through later processing that includes stripping the layer off, bonding it to an oxidized silicon wafer, and annealing it to create strained-silicon-on-insulator (SSOI) substrates.

The research was performed at Argonne National Laboratory’s Advanced Photon Source, and supported in part by the Department of Energy.