Integrated circuits, which enable virtually every electronics gadget you use on a daily basis, are constantly being pushed by the semiconductor industry to become smaller, faster, and cheaper. As has happened many times in the past and will continue in the future, integrated circuit scaling is perpetually in danger of hitting a wall that must be maneuvered around.
According to Maxime Darnon, a researcher at the French National Center for Scientific Research, in order to continue increasing the speed of integrated circuits, interconnect insulators will require an upgrade to porous, low-dielectric constant materials. Darnon and colleagues discuss the details in the Journal of Applied Physics, which is published by the American Institute of Physics (AIP).
"The integration of a replacement, porous SiCOH (pSiCOH), however, poses serious problems such as an unacceptable 'roughening' that occurs during plasma processing," explains Darnon. "This is considered a 'showstopper' to faster integrated circuits at the moment, so a fundamental understanding of the roughening mechanisms that occur during the etch process of integrated circuit manufacturing is highly desirable to material designers and etch-process engineers.
Darnon's research team proposes a mechanism for the roughening of pSiCOH materials etched in a fluorocarbon-based plasma. They've shown that the problematic roughness results from a cracking of the denser top surface under ion bombardment, and that this roughness propagates through a slower etching of the dense top surface than the modified porous material beneath it. Perhaps more importantly, the team recommends ways to minimize this phenomenon so that the "showstopper" will only be a speedbump on the road to faster integrated circuits.
Materials provided by American Institute of Physics. Note: Content may be edited for style and length.
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