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Integrating graphene, reduced graphene oxide onto silicon chips at room temperature

Date:
September 13, 2016
Source:
North Carolina State University
Summary:
Researchers have developed a technique that allows them to integrate graphene, graphene oxide and reduced graphene oxide onto silicon substrates at room temperature using lasers. The advance raises the possibility of creating new electronic devices, and the researchers are already planning to use the technique to create smart biomedical sensors.
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Materials researchers at North Carolina State University have developed a technique that allows them to integrate graphene, graphene oxide (GO) and reduced graphene oxide (rGO) onto silicon substrates at room temperature by using nanosecond pulsed laser annealing. The advance raises the possibility of creating new electronic devices, and the researchers are already planning to use the technique to create smart biomedical sensors.

In the new technique, researchers start with a silicon substrate. They top that with a layer of single-crystal titanium nitride, using domain matching epitaxy to ensure the crystalline structure of the titanium nitride is aligned with the structure of the silicon. Researchers then place a layer of copper-carbon (Cu-2.0 atomic percent C) alloy on top of the titanium nitride, again using domain matching epitaxy. Finally, the researchers melt the surface of the alloy with nanosecond laser pulses, which pulls carbon to the surface.

If the process is done in a vacuum, the carbon forms on the surface as graphene; if it is done in oxygen, it forms GO; and if done in a humid atmosphere followed by a vacuum, it forms as rGO. In all three cases, the carbon's crystalline structure is aligned with the underlying copper-carbon alloy.

"We can control whether the carbon forms one or two monolayers on the surface of the material by manipulating the intensity of the laser and the depth of the melting," says Jay Narayan, the John C. Fan Distinguished Chair Professor of Materials Science and Engineering at NC State and senior author of a paper describing the work.

"The process can easily be scaled up," Narayan says. "We've made wafers that are two inches square, and could easily make them much larger, using lasers with higher Hertz. And this is all done at room temperature, which drives down the cost."

Graphene is an excellent conductor, but it cannot be used as a semiconductor. However, rGO is a semiconductor material, which can be used to make electronic devices such as integrated smart sensors and optic-electronic devices.

"We have already patented the technique and are planning to use it to develop smart biomedical sensors integrated with computer chips," Narayan says.


Story Source:

Materials provided by North Carolina State University. Note: Content may be edited for style and length.


Journal Reference:

  1. Anagh Bhaumik, Jagdish Narayan. Wafer scale integration of reduced graphene oxide by novel laser processing at room temperature in air. Journal of Applied Physics, 2016; 120 (10): 105304 DOI: 10.1063/1.4962210

Cite This Page:

North Carolina State University. "Integrating graphene, reduced graphene oxide onto silicon chips at room temperature." ScienceDaily. ScienceDaily, 13 September 2016. <www.sciencedaily.com/releases/2016/09/160913124730.htm>.
North Carolina State University. (2016, September 13). Integrating graphene, reduced graphene oxide onto silicon chips at room temperature. ScienceDaily. Retrieved March 18, 2024 from www.sciencedaily.com/releases/2016/09/160913124730.htm
North Carolina State University. "Integrating graphene, reduced graphene oxide onto silicon chips at room temperature." ScienceDaily. www.sciencedaily.com/releases/2016/09/160913124730.htm (accessed March 18, 2024).

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